/*
 * implements the "two or more" function
 * described in Prosser page 338
*/

[Up: pdp8_cpu MOP]
module pdp8_MOREOPIndex (
  RQST1,
  RQST2,
  RQST3,
  RQST4,
  MOREOP
);

input RQST1, RQST2, RQST3, RQST4;
output reg MOREOP;

always @ (*)
begin
  casez ({RQST4, RQST3, RQST2, RQST1})
    4'b??11: MOREOP = 1'b1;
    4'b?11?: MOREOP = 1'b1;
    4'b11??: MOREOP = 1'b1;
    4'b1??1: MOREOP = 1'b1;
    4'b?1?1: MOREOP = 1'b1;
    4'b1?1?: MOREOP = 1'b1;
    default: MOREOP = 1'b0;
  endcase
end


endmodule


This page: Maintained by: brian.white@umb.edu
Created:Thu Dec 6 19:56:28 2018
From: ../../pdp8_MOREOP.v

Verilog converted to html by v2html 7.30.1.3 (written by Costas Calamvokis).Help